# BCM4359 WLCSPSS module with iPA, eLNA front-end configuration, Panasonic switches in both bands -
NVRAMRev=$Rev: 522729 $
sromrev=11
boardrev=0x1101
boardtype=0x07ad
boardflags=0x10481201
#BFL_FEM_BT changed to 0 in boardflags to indicate bt supports dlna
boardflags2=0x00800000
boardflags3=0x48700186
#boardnum=57410 
macaddr=00:90:4c:12:d0:01
ccode=0
regrev=0
antswitch=0
pdgain5g=0
pdgain2g=0
tworangetssi2g=0
tworangetssi5g=0
AvVmid_c0=2,130,2,130,2,130,2,130,2,130
AvVmid_c1=2,130,2,130,2,130,2,130,2,130
# JIRA:SW4349-945 MANDATORY! Update makefile in case you touch femctl
femctrl=14
vendid=0x14e4
fdss_level_2g=4,4
fdss_level_5g=4,4
fdss_interp_en=1
devid=0x43ef
manfid=0x2d0
#prodid=0x052e
nocrc=1
btc_mode=1
btcdyn_flags=0x0
otpimagesize=502
xtalfreq=37400
rxgains2gelnagaina0=3
rxgains2gtrisoa0=8
rxgains2gtrelnabypa0=1
rxgains5gelnagaina0=3
rxgains5gtrisoa0=7
rxgains5gtrelnabypa0=1
rxgains5gmelnagaina0=2
rxgains5gmtrisoa0=6
rxgains5gmtrelnabypa0=1
rxgains5ghelnagaina0=1
rxgains5ghtrisoa0=5
rxgains5ghtrelnabypa0=1
rxgains2gelnagaina1=3
rxgains2gtrisoa1=8
rxgains2gtrelnabypa1=1
rxgains5gelnagaina1=3
rxgains5gtrisoa1=7
rxgains5gtrelnabypa1=1
rxgains5gmelnagaina1=2
rxgains5gmtrisoa1=6
rxgains5gmtrelnabypa1=1
rxgains5ghelnagaina1=1
rxgains5ghtrisoa1=5
rxgains5ghtrelnabypa1=1
cckdigfilttype=5
rxchain=3
txchain=3
aa2g=3
aa5g=3
agbg0=2
agbg1=2
aga0=2
aga1=2
tssipos2g=1
extpagain2g=2
tssipos5g=1
extpagain5g=2
tempthresh=255
tempoffset=255
rawtempsense=0x1ff
pa2gccka0=-220,7121,-867
pa2gccka1=-225,7151,-872
pa2ga0=-206,6686,-805
pa2ga1=-216,6765,-821
pa5ga0=-160,7727,-932,-153,7856,-942,-148,7867,-945,-133,8263,-992
pa5ga1=-149,7898,-947,-155,7783,-939,-162,7626,-923,-153,7718,-927
pa5gbw4080a0=-151,8987,-1080,-154,8834,-1062,-138,9463,-1134,-138,9214,-1112
pa5gbw4080a1=-171,8168,-993,-175,8032,-978,-174,8193,-999,-166,8337,-1012
maxp2ga0=74
maxp2ga1=74
maxp5ga0=74,74,74,74
maxp5ga1=74,74,74,74
subband5gver=0x4
paparambwver=3
cckpwroffset0=0
cckpwroffset1=0
cckulbpwroffset0=-6
cckulbpwroffset1=-6
pdoffset40ma0=0x0000
pdoffset80ma0=0xeeee
pdoffset40ma1=0x0000
pdoffset80ma1=0xeeee
cckbw202gpo=0
cckbw20ul2gpo=0
mcsbw202gpo=0xa9855422
mcsbw402gpo=0xa9855422
dot11agofdmhrbw202gpo=0x6622
ofdmlrbw202gpo=0x0000
mcsbw205glpo=0xa9866663
mcsbw405glpo=0xa9866663
mcsbw805glpo=0xbb866665
mcsbw1605glpo=0
mcsbw205gmpo=0xd9866663
mcsbw405gmpo=0xa9866663
mcsbw805gmpo=0xcc866665
mcsbw1605gmpo=0
mcsbw205ghpo=0xdc866663
mcsbw405ghpo=0xaa866663
mcsbw805ghpo=0xdd866665
mcsbw1605ghpo=0
mcslr5glpo=0x0000
mcslr5gmpo=0x0000
mcslr5ghpo=0x0000
sb20in40hrpo=0x0
sb20in80and160hr5glpo=0x0
sb40and80hr5glpo=0x0
sb20in80and160hr5gmpo=0x0
sb40and80hr5gmpo=0x0
sb20in80and160hr5ghpo=0x0
sb40and80hr5ghpo=0x0
sb20in40lrpo=0x0
sb20in80and160lr5glpo=0x0
sb40and80lr5glpo=0x0
sb20in80and160lr5gmpo=0x0
sb40and80lr5gmpo=0x0
sb20in80and160lr5ghpo=0x0
sb40and80lr5ghpo=0x0
dot11agduphrpo=0x0
dot11agduplrpo=0x0
phycal_tempdelta=15
temps_period=15
temps_hysteresis=15
ltecxmux=0
ltecxpadnum=0x0908
ltecxfnsel=0x44
ltecxgcigpio=0x43
#OOB params
#device_wake_opt=1
host_wake_opt=0
swctrlmap_2g=0x00000808,0x30300000,0x10100000,0x020202,0x1f8
swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x001
swctrlmap_5g=0x00004040,0x80800000,0x80800000,0x000000,0x1c8
swctrlmapext_5g=0x00000000,0x01010000,0x00000000,0x000000,0x001
#femctrl masks updated for bt dlna board, all bt sw lines are blocked
muxenab=1
rssi_delta_2g_c0=-4,-2,-4,-2
rssi_delta_2g_c1=-4,-3,-4,-3
rssi_delta_5gl_c0=0,2,0,2,3,5
#rssi_delta_5gml_c0=-4,-1,-4,0,-2,2
rssi_delta_5gmu_c0=-4,-1,-4,0,-2,2
rssi_delta_5gh_c0=-2,0,-3,0,0,2
rssi_delta_5gl_c1=0,2,0,2,3,5
rssi_delta_5gml_c1=-4,-1,-4,0,-2,2
rssi_delta_5gmu_c1=-4,-1,-4,0,-2,2
rssi_delta_5gh_c1=-2,0,-3,0,0,2
powoffs2gtna0=-1,0,1,2,2,2,2,2,1,1,1,0,0,0
powoffs2gtna1=1,3,3,3,3,3,3,3,3,3,3,3,2,0
fem_table_init_val=0x10100000,0x80800000
# deadman timeout 3sec - timeout val:3x: x=arm clock
deadman_to=960000000
